Silicon components are typically tested after being manufactured in order to ensure functionality and quality. Testing of silicon components in production lines is sometimes called HVM (High-Volume Manufacturing) testing. One type of HVM testing, “sort” testing, may be performed on components that are unpackaged and still exist as die on a manufactured silicon wafer. Another type of HVM testing, “class” testing, may be performed on components that exist as die that have been cut from a manufactured silicon wafer and subsequently packaged for potential sale to customers.
HVM testers—i.e., the machines used to perform HVM tests—are complex and expensive. As a result, the amount of time required to test a component on an HVM tester may contribute significantly to the cost required to manufacture the component. There is accordingly a tension between testing components to ensure their functionality and quality, and limiting the time required to perform the testing on HVM testers.
A variety of types of HVM tests may be performed on a component at sort testing, at class testing, or both. These tests may use a variety of DFT (Design for Test) and DFM (Design for Manufacturability) features of the component which are designed to maximize the comprehensiveness of the tests while minimizing the time required to perform the tests.
For example, a particular circuit or feature of the component such as a Random-Access Memory (RAM) might be designed to include Built-In Self Test (BIST) circuitry which may be activated to perform relatively rapid and/or comprehensive testing of the circuit or feature. As another example, for components with substantial portions implemented through a mix of combinational logic and sequential logic, the elementary units of the sequential logic (e.g. shift registers) may be designed to accommodate “scan” inputs and “scan” outputs, which are auxiliary inputs and outputs of the shift registers. The scan output of one register may then be connected to the scan input of another register, and so on, and one or more “scan chains” of registers may thereby be formed on the component. Once formed, an HVM test may load the scan chains with an arbitrary sequence of values, then apply one clock cycle to the shift registers. Such scan tests will in turn exercise some portion of the combinational logic.
Another type of test that may be applied to a component are functional tests. Under a functional test, the component may be subjected to stimulus of the sort it would experience in actual working conditions. The response of the component to the stimulus may then be compared to the expected response of the component to that stimulus. Functional tests may help to improve test coverage achieved by DFT and DFM tests such as BIST testing or scan testing. In other words, if the suite of DFT-based tests and DFM-based tests do not cover certain portions of the design, then functional tests may be written to cover those previously-uncovered design portions.